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Digital signal processing · Subtopic 1 of 1

Logic Gates and Counters

Logic gates combine binary inputs: AND (A⋅BA\cdot B), OR (A+BA+B), NOT (Aˉ\bar A), NAND, NOR and XOR. Truth tables list every input combination (2n2^n rows). Sequential circuits remember: an astable produces a clock signal, and a binary counter counts its pulses; each stage halves the frequency.

AQA 7408 Paper 3B≈ 40 minRevision 1 · updated 2026-10-27
Section 1 of 14

Learning objectives

  • Use the six common logic gates and Boolean notation.
  • Build truth tables for combinations of gates.
  • Describe binary and BCD counters and frequency division.
Pause and think

A car's interior light comes on if the driver's door OR the passenger door is open. Which gate is that?

Section 2 of 14

Core idea

Start hereDecisions in silicon

"If the door is open AND it's dark, turn on the light." Every such rule can be built from a handful of simple switches called logic gates. Billions of them, clocked millions of times a second, make a computer.

The big idea

Gates combine 0s and 1s; truth tables list all 2n2^n input combinations. Counters chain flip-flops, each halving the clock frequency.

1. Combinational logic

Worked exampleQ=A⋅B‾+CQ=\overline{A\cdot B}+C

For which inputs is Q=0Q=0?

Goal
Rows with Q=0Q=0.
Strategy
An OR is 0 only if both terms are 0.
  1. C=0C=0
    Second term must be 0.
  2. A⋅B‾=0⇒A=B=1\overline{A\cdot B}=0\Rightarrow A=B=1
    NAND is 0 only when both inputs are 1.
AnswerOnly A=1A=1, B=1B=1, C=0C=0.
✓ Check7 of 8 rows give Q=1Q=1 ✓.
NAND makes NOT and AND
  1. A⋅A‾=Aˉ\overline{A\cdot A}=\bar A
    Join a NAND's inputs: NOT gate.
  2. A⋅B‾‾=A⋅B\overline{\overline{A\cdot B}}=A\cdot B
    NAND followed by NOT: AND gate.
NAND is universal: every other gate can be built from it.

2. Counters

Worked exampleFrequency division

A 16001600 Hz clock drives a 4-bit binary counter.

Goal
Frequency of each output.
Strategy
Each stage halves.
  1. f0=16002=800 Hzf_0=\frac{1600}2=800\text{ Hz}
    Bit 0 toggles once per clock pulse, so it completes a cycle every two pulses.
  2. 800, 400, 200, 100 Hz800,\ 400,\ 200,\ 100\text{ Hz}
    Each later bit halves again: bits 0 to 3.
AnswerMSB at 100100 Hz.
✓ Check160024=100\frac{1600}{2^4}=100 ✓.
A counter system

Clock in, binary count out.

Key takeawayBCD A BCD counter resets after 9, so each 4-bit group shows one decimal digit.
Common misconceptionOR vs XOR OR includes the case where both inputs are 1; XOR excludes it.
Pause and think

How many flip-flops are needed to count to 100?

Summary

  • AND, OR, NOT, NAND, NOR, XOR.
  • 2n2^n rows.
  • Counters halve frequency per bit.
Key words
Truth table
List of outputs for every input combination.
Astable
Circuit producing a continuous pulse train.
Counter
Sequential circuit counting clock pulses.
HistoryBoole. George Boole, a self-taught mathematician in Ireland, invented the algebra of AND, OR and NOT in 1854, nearly a century before electronic computers.
Fun factBillions of gates. A modern phone processor contains tens of billions of transistors forming logic gates.
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